On Tue, Jun 28, 2022 at 01:17:08AM -0700, Colin Foster wrote: > Add devicetree bindings for SPI-controlled Ocelot chips, specifically the > VSC7512. > > Signed-off-by: Colin Foster <colin.foster@xxxxxxxxxxxxxxxx> > --- > .../devicetree/bindings/mfd/mscc,ocelot.yaml | 160 ++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 161 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml > > diff --git a/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml > new file mode 100644 > index 000000000000..24fab9f5e319 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml > @@ -0,0 +1,160 @@ > +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Ocelot Externally-Controlled Ethernet Switch > + > +maintainers: > + - Colin Foster <colin.foster@xxxxxxxxxxxxxxxx> > + > +description: | > + The Ocelot ethernet switch family contains chips that have an internal CPU > + (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have > + the option to be controlled externally, which is the purpose of this driver. > + > + The switch family is a multi-port networking switch that supports many > + interfaces. Additionally, the device can perform pin control, MDIO buses, and > + external GPIO expanders. > + > +properties: > + compatible: > + enum: > + - mscc,vsc7512-spi > + > + reg: > + maxItems: 1 > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + spi-max-frequency: > + maxItems: 1 > + > +patternProperties: > + "^pinctrl@[0-9a-f]+$": > + type: object > + $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml > + > + "^gpio@[0-9a-f]+$": > + type: object > + $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml > + properties: > + compatible: > + enum: > + - mscc,ocelot-sgpio > + > + "^mdio@[0-9a-f]+$": > + type: object > + $ref: /schemas/net/mscc,miim.yaml > + properties: > + compatible: > + enum: > + - mscc,ocelot-miim > + > +required: > + - compatible > + - reg > + - '#address-cells' > + - '#size-cells' > + - spi-max-frequency > + > +additionalProperties: false > + > +examples: > + - | > + ocelot_clock: ocelot-clock { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <125000000>; > + }; > + > + spi { > + #address-cells = <1>; > + #size-cells = <0>; > + > + switch@0 { I wonder if "switch" is the best name for the top-level node, since there should also be another "switch" child node inside for the _actual_ DSA bindings, which this example is not showing (leading to further confusion IMO). Hmm, would "soc" be an exaggerated name? It's a SPI-controlled SoC after all. > + compatible = "mscc,vsc7512"; > + spi-max-frequency = <2500000>; > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + mdio@7107009c { > + compatible = "mscc,ocelot-miim"; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x7107009c 0x24>; > + > + sw_phy0: ethernet-phy@0 { > + reg = <0x0>; > + }; > + }; > + > + mdio@710700c0 { > + compatible = "mscc,ocelot-miim"; > + pinctrl-names = "default"; > + pinctrl-0 = <&miim1_pins>; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x710700c0 0x24>; > + > + sw_phy4: ethernet-phy@4 { > + reg = <0x4>; > + }; > + }; > + > + gpio: pinctrl@71070034 { > + compatible = "mscc,ocelot-pinctrl"; > + gpio-controller; > + #gpio-cells = <2>; > + gpio-ranges = <&gpio 0 0 22>; > + reg = <0x71070034 0x6c>; > + > + sgpio_pins: sgpio-pins { > + pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3"; > + function = "sg0"; > + }; > + > + miim1_pins: miim1-pins { > + pins = "GPIO_14", "GPIO_15"; > + function = "miim"; > + }; > + }; > + > + gpio@710700f8 { > + compatible = "mscc,ocelot-sgpio"; > + #address-cells = <1>; > + #size-cells = <0>; > + bus-frequency = <12500000>; > + clocks = <&ocelot_clock>; > + microchip,sgpio-port-ranges = <0 15>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sgpio_pins>; > + reg = <0x710700f8 0x100>; > + > + sgpio_in0: gpio@0 { > + compatible = "microchip,sparx5-sgpio-bank"; > + reg = <0>; > + gpio-controller; > + #gpio-cells = <3>; > + ngpios = <64>; > + }; > + > + sgpio_out1: gpio@1 { > + compatible = "microchip,sparx5-sgpio-bank"; > + reg = <1>; > + gpio-controller; > + #gpio-cells = <3>; > + ngpios = <64>; > + }; > + }; > + }; > + }; > + > +... > + > diff --git a/MAINTAINERS b/MAINTAINERS > index 4d9ccec78f18..03eba7fd2141 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -14416,6 +14416,7 @@ F: tools/testing/selftests/drivers/net/ocelot/* > OCELOT EXTERNAL SWITCH CONTROL > M: Colin Foster <colin.foster@xxxxxxxxxxxxxxxx> > S: Supported > +F: Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml > F: include/linux/mfd/ocelot.h > > OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER > -- > 2.25.1 >
