Add support for the SPI NOR flash memory present on the Asurada
platform.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@xxxxxxxxxxxxx>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
---
Changes in v4:
- Added this patch
.../boot/dts/mediatek/mt8192-asurada.dtsi | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
index a5625b3cb317..4b314435f8fd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
@@ -241,6 +241,23 @@ &mt6359codec {
mediatek,mic-type-2 = <2>; /* DMIC */
};
+&nor_flash {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&nor_flash_pins>;
+ assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
+
+ flash@0 {
+ compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <2>;
+ };
+};
+
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
@@ -658,6 +675,29 @@ pins-clk {
};
};
+ nor_flash_pins: nor-flash-default-pins {
+ pins-cs-io1 {
+ pinmux = <PINMUX_GPIO24__FUNC_SPINOR_CS>,
+ <PINMUX_GPIO28__FUNC_SPINOR_IO1>;
+ input-enable;
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ pins-io0 {
+ pinmux = <PINMUX_GPIO27__FUNC_SPINOR_IO0>;
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ pins-clk {
+ pinmux = <PINMUX_GPIO25__FUNC_SPINOR_CK>;
+ input-enable;
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+ };
+
pcie_pins: pcie-default-pins {
pins-pcie-wake {
pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>;
--
2.36.1
