Hi Chanho, On Tue, Jun 28, 2022 at 01:42:22PM +0900, Chanho Park wrote: > Add exynosautov9 spi port configuration. It supports up to 12 spis so > MAX_SPI_PORTS should be increased from 6 to 12. > It has DIV_4 as the default internal clock divider and an internal > loopback mode to run a loopback test. > > Signed-off-by: Chanho Park <chanho61.park@xxxxxxxxxxx> Reviewed-by: Andi Shyti <andi@xxxxxxxxxxx> Thanks, Andi
