On 28/06/2022 06:42, Chanho Park wrote: > Add exynosautov9 spi port configuration. It supports up to 12 spis so > MAX_SPI_PORTS should be increased from 6 to 12. > It has DIV_4 as the default internal clock divider and an internal > loopback mode to run a loopback test. > > Signed-off-by: Chanho Park <chanho61.park@xxxxxxxxxxx> > --- > drivers/spi/spi-s3c64xx.c | 18 +++++++++++++++++- > 1 file changed, 17 insertions(+), 1 deletion(-) > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
