Mark "pll[0|1]-refclk", "refclk-dig" and "cmn-refclk1?-dig-div"
as deprecated. The clock muxes are provided by the device driver
so not required in device tree.
Cc: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Roger Quadros <rogerq@xxxxxxxxxx>
---
Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
index dcd63908aeae..3127bb648427 100644
--- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
+++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
@@ -83,6 +83,7 @@ properties:
WIZ node should have subnode for refclk_dig to select the reference
clock source for the reference clock used in the PHY and PMA digital
logic.
+ deprecated: true
properties:
clocks:
minItems: 2
@@ -111,6 +112,7 @@ patternProperties:
description: |
WIZ node should have subnodes for each of the PLLs present in
the SERDES.
+ deprecated: true
properties:
clocks:
maxItems: 2
@@ -136,6 +138,7 @@ patternProperties:
description:
WIZ node should have subnodes for each of the PMA common refclock
provided by the SERDES.
+ deprecated: true
properties:
clocks:
maxItems: 1
--
2.17.1
