Hi Shengjiu,
On 22-06-20, Shengjiu Wang wrote:
> Add bt-sco sound card, which supports wb profile as default
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 43 +++++++++++++++++++
> 1 file changed, 43 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> index c42b966f7a64..cf734d2a94be 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> @@ -75,6 +75,11 @@
> linux,autosuspend-period = <125>;
> };
>
> + audio_codec_bt_sco: audio-codec-bt-sco {
> + #sound-dai-cells = <1>;
> + compatible = "linux,bt-sco";
The compatible property should always be the first property. This
apply to your other patches as well.
Regards,
Marco
> + };
> +
> wm8524: audio-codec {
> #sound-dai-cells = <0>;
> compatible = "wlf,wm8524";
> @@ -107,6 +112,25 @@
> clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
> };
> };
> +
> + sound-bt-sco {
> + compatible = "simple-audio-card";
> + simple-audio-card,name = "bt-sco-audio";
> + simple-audio-card,format = "dsp_a";
> + simple-audio-card,bitclock-inversion;
> + simple-audio-card,frame-master = <&btcpu>;
> + simple-audio-card,bitclock-master = <&btcpu>;
> +
> + btcpu: simple-audio-card,cpu {
> + sound-dai = <&sai2>;
> + dai-tdm-slot-num = <2>;
> + dai-tdm-slot-width = <16>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&audio_codec_bt_sco 1>;
> + };
> + };
> };
>
> &A53_0 {
> @@ -346,6 +370,16 @@
> status = "okay";
> };
>
> +&sai2 {
> + #sound-dai-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_sai2>;
> + assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
> + assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
> + assigned-clock-rates = <24576000>;
> + status = "okay";
> +};
> +
> &sai3 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_sai3>;
> @@ -494,6 +528,15 @@
> >;
> };
>
> + pinctrl_sai2: sai2grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
> + MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
> + MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
> + MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
> + >;
> + };
> +
> pinctrl_sai3: sai3grp {
> fsl,pins = <
> MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
> --
> 2.17.1
>
>
>
