Hi Peng, Thank you for the patch. On Wed, Jun 01, 2022 at 05:45:30PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@xxxxxxx> > > Add interconnect property for i.MX8MP mediamix blk ctrl > > Signed-off-by: Peng Fan <peng.fan@xxxxxxx> > --- > .../soc/imx/fsl,imx8mp-media-blk-ctrl.yaml | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml > index 21d3ee486295..706bef39b87e 100644 > --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml > +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml > @@ -64,6 +64,20 @@ properties: > - const: isp > - const: phy > > + interconnects: > + maxItems: 8 > + > + interconnect-names: > + items: > + - const: lcdif-rd > + - const: lcdif-wr > + - const: isi0 > + - const: isi1 > + - const: isi2 If I understand correctly, these are for the 1x RD and 2x WR channels of the ISI. Would it make sense to name thim accordingly, maybe isi-rd, isi-wr0 and isi-wr1 ? I'm not sure about the order though. > + - const: isp0 > + - const: isp1 > + - const: dwe > + > required: > - compatible > - reg -- Regards, Laurent Pinchart
