On 31/05/2022 03:22, Alim Akhtar wrote: > Move CDR lock offset to drv data so that it can > be extended for other SoCs which are having CDR > lock at different register offset. > > Cc: linux-fsd@xxxxxxxxx > Signed-off-by: Bharat Uppal <bharat.uppal@xxxxxxxxxxx> > Signed-off-by: Alim Akhtar <alim.akhtar@xxxxxxxxxxx> > --- > drivers/phy/samsung/phy-exynos7-ufs.c | 3 +++ > drivers/phy/samsung/phy-exynosautov9-ufs.c | 2 ++ > drivers/phy/samsung/phy-samsung-ufs.c | 3 ++- > drivers/phy/samsung/phy-samsung-ufs.h | 2 +- > 4 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/phy/samsung/phy-exynos7-ufs.c b/drivers/phy/samsung/phy-exynos7-ufs.c > index 7c9008e163db..d1a37273cb1f 100644 > --- a/drivers/phy/samsung/phy-exynos7-ufs.c > +++ b/drivers/phy/samsung/phy-exynos7-ufs.c > @@ -11,6 +11,8 @@ > #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1 > #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0) > > +#define PHY_CDR_LOCK_STATUS 0x5e This should be now renamed to match other defines here, so EXYNOS7_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS Best regards, Krzysztof
