Add eSPI to the device tree for Aspeed 5/6th generation SoCs.
Signed-off-by: Chia-Wei Wang <chiawei_wang@xxxxxxxxxxxxxx>
---
arch/arm/boot/dts/aspeed-g5.dtsi | 17 +++++++++++++++++
arch/arm/boot/dts/aspeed-g6.dtsi | 17 +++++++++++++++++
2 files changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 4147b397c883..4b5bb91a0219 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -289,6 +289,23 @@ adc: adc@1e6e9000 {
status = "disabled";
};
+ espi: espi@1e6ee000 {
+ compatible = "aspeed,ast2500-espi", "simple-mfd", "syscon";
+ reg = <0x1e6ee000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e6ee000 0x1000>;
+
+ espi_ctrl: espi-ctrl@0 {
+ compatible = "aspeed,ast2500-espi-ctrl";
+ reg = <0x0 0x800>;
+ interrupts = <23>;
+ clocks = <&syscon ASPEED_CLK_GATE_ESPICLK>;
+ status = "disabled";
+ };
+ };
+
video: video@1e700000 {
compatible = "aspeed,ast2500-video-engine";
reg = <0x1e700000 0x1000>;
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 3d5ce9da42c3..1f14ecad51af 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -384,6 +384,23 @@ adc1: adc@1e6e9100 {
status = "disabled";
};
+ espi: espi@1e6ee000 {
+ compatible = "aspeed,ast2600-espi", "simple-mfd", "syscon";
+ reg = <0x1e6ee000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e6ee000 0x1000>;
+
+ espi_ctrl: espi-ctrl@0 {
+ compatible = "aspeed,ast2600-espi-ctrl";
+ reg = <0x0 0x800>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&syscon ASPEED_CLK_GATE_ESPICLK>;
+ status = "disabled";
+ };
+ };
+
sbc: secure-boot-controller@1e6f2000 {
compatible = "aspeed,ast2600-sbc";
reg = <0x1e6f2000 0x1000>;
--
2.25.1
