(resend without the html)
On 5/05/22 21:19, Krzysztof Kozlowski wrote:
>> + core_clock: core_clock {
> No underscores in node names.
>
> All these clocks do not look like real clocks. Where are they if outside
> of SoC? These should be fed from clock controllers, shouldn't they? If
> they are provided by boards, don't put them into SoC...
>
>> + compatible = "fixed-clock";
>> + #clock-cells = <0>;
>> + clock-frequency = <400000000>;
>> + };
>> +
>> + axi_clock: axi_clock {
>> + compatible = "fixed-clock";
>> + #clock-cells = <0>;
>> + clock-frequency = <325000000>;
>> + };
>> +
>> + spi_clock: spi_clock {
>> + compatible = "fixed-clock";
>> + #clock-cells = <0>;
>> + clock-frequency = <200000000>;
>> + };
Based on the information I have (which isn't much) there is a ref_clk
input that is connected to a 25MHz oscillator and then I'm assuming
these are all generated from that with various dividers. 25MHz is the
only documented option.
There doesn't appear to be any documented register where I can read out
the divider ratios. It might be nice I could have the fixed osc node and
have these 3 clocks derived with fixed divisors but I don't see any what
of achieving that.
