[PATCH v2 2/4] dt-bindings: mfd: atmel,flexcom: Add lan966 compatible string and mux properties

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Add lan966 flexcom compatible string and flexcom mux
device tree properties.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@xxxxxxxxxxxxx>
---
 .../bindings/mfd/atmel,flexcom.yaml           | 52 ++++++++++++++++++-
 1 file changed, 51 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml
index 79ec7ebc7055..228c095c84ca 100644
--- a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml
+++ b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml
@@ -16,7 +16,9 @@ description:
 
 properties:
   compatible:
-    const: atmel,sama5d2-flexcom
+    enum:
+      - atmel,sama5d2-flexcom
+      - microchip,lan966-flexcom
 
   reg:
     maxItems: 1
@@ -57,6 +59,27 @@ required:
 
 additionalProperties: false
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: microchip,lan966-flexcom
+
+    then:
+      properties:
+        mux-controls:
+          minItems: 1
+          maxItems: 2
+          $ref: /schemas/types.yaml#/definitions/phandle-array
+
+        mux-control-names:
+          minItems: 1
+          $ref: ../mux/mux-consumer.yaml
+          items:
+            - const: cs0
+            - const: cs1
+
 patternProperties:
   "^serial@[0-9a-f]+$":
     description: See atmel-usart.txt for details of USART bindings.
@@ -89,4 +112,31 @@ examples:
                 atmel,fifo-size = <32>;
           };
     };
+
+  - |
+    flx3: flexcom@e0064000 {
+          compatible = "microchip,lan966-flexcom";
+          reg = <0xe0064000 0x100>;
+          clocks = <&fabric_clk>;
+          #address-cells = <1>;
+          #size-cells = <1>;
+          ranges = <0x0 0xe0064000 0x800>;
+          atmel,flexcom-mode = <2>;
+          mux-controls = <&mux 0>;
+          mux-control-names = "cs0";
+
+          spi3: spi@400 {
+                compatible = "atmel,at91rm9200-spi";
+                reg = <0x400 0x200>;
+                interrupts = <0 51 4>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                clocks = <&fabric_clk>;
+                clock-names = "spi_clk";
+                pinctrl-0 = <&fc3_b_sck_pins>, <&fc3_b_rxd_pins>,
+                            <&fc3_b_txd_pins>, <&fc_shrd9_pins>;
+                pinctrl-names = "default";
+                atmel,fifo-size = <32>;
+          };
+    };
 ...
-- 
2.17.1




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