On Thu, May 05, 2022 at 04:14:30PM -0700, Douglas Anderson wrote: > sc7280-herobrine based boards are specced to be able to access their > SPI flash at 50 MHz with the drive strength of the pins set at 8. The > drive strength is already set to 8 in "sc7280-herobrine.dtsi", so > let's bump up the clock. The matching firmware change for this is at: > > https://review.coreboot.org/c/coreboot/+/63948 > > NOTE: the firmware change isn't _required_ to make the kernel work at > 50 MHz, it merely shows that the boards are known to work fine at 50 > MHz. > > ALSO NOTE: this doesn't update the "sc7280-chrome-common.dtsi" file > which is used by both herobrine boards and IDP. At the moment the IDP > boards aren't configuring a drive strength of 8 and it seems safer to > just leave them at the slower speed if they're already working. > > Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx> Reviewed-by: Matthias Kaehlcke <mka@xxxxxxxxxxxx>
