Am Sonntag, 1. Mai 2022, 21:25:54 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>
> Having the SoC vendor both as the directory and in the filename adds
> little. Remove microchip from the filenames so that the files will
> resemble the other directories in riscv (and arm64). The new names
> follow a soc-board.dts & soc{,-fabric}.dtsi pattern.
>
> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Reviewed-by: Heiko Stuebner <heiko@xxxxxxxxx>
Nice cleanup
> ---
> arch/riscv/boot/dts/microchip/Makefile | 2 +-
> .../microchip/{microchip-mpfs-fabric.dtsi => mpfs-fabric.dtsi} | 0
> .../{microchip-mpfs-icicle-kit.dts => mpfs-icicle-kit.dts} | 2 +-
> .../riscv/boot/dts/microchip/{microchip-mpfs.dtsi => mpfs.dtsi} | 2 +-
> 4 files changed, 3 insertions(+), 3 deletions(-)
> rename arch/riscv/boot/dts/microchip/{microchip-mpfs-fabric.dtsi => mpfs-fabric.dtsi} (100%)
> rename arch/riscv/boot/dts/microchip/{microchip-mpfs-icicle-kit.dts => mpfs-icicle-kit.dts} (98%)
> rename arch/riscv/boot/dts/microchip/{microchip-mpfs.dtsi => mpfs.dtsi} (99%)
>
> diff --git a/arch/riscv/boot/dts/microchip/Makefile b/arch/riscv/boot/dts/microchip/Makefile
> index 855c1502d912..af3a5059b350 100644
> --- a/arch/riscv/boot/dts/microchip/Makefile
> +++ b/arch/riscv/boot/dts/microchip/Makefile
> @@ -1,3 +1,3 @@
> # SPDX-License-Identifier: GPL-2.0
> -dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += microchip-mpfs-icicle-kit.dtb
> +dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
> obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi
> similarity index 100%
> rename from arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
> rename to arch/riscv/boot/dts/microchip/mpfs-fabric.dtsi
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
> similarity index 98%
> rename from arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> rename to arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
> index c71d6aa6137a..84b0015dfd47 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
> @@ -3,7 +3,7 @@
>
> /dts-v1/;
>
> -#include "microchip-mpfs.dtsi"
> +#include "mpfs.dtsi"
>
> /* Clock frequency (in Hz) of the rtcclk */
> #define RTCCLK_FREQ 1000000
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
> similarity index 99%
> rename from arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> rename to arch/riscv/boot/dts/microchip/mpfs.dtsi
> index bf21a2edd180..cc3386068c2d 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
> @@ -3,7 +3,7 @@
>
> /dts-v1/;
> #include "dt-bindings/clock/microchip,mpfs-clock.h"
> -#include "microchip-mpfs-fabric.dtsi"
> +#include "mpfs-fabric.dtsi"
>
> / {
> #address-cells = <2>;
>
