Am Sonntag, 1. Mai 2022, 21:25:52 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>
> The clock properties in the icicle kit's memory entries cause dtbs_check
> errors:
> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: /: memory@80000000: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Get rid of the clocks to avoid the errors.
>
> Reported-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
> Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board")
> Fixes: 5b28df37d311 ("riscv: dts: microchip: update peripherals in icicle kit device tree")
> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Reviewed-by: Heiko Stuebner <heiko@xxxxxxxxx>
I guess the memory controller consuming this clock will be sitting
somewhere in the io-area of the soc instead
> ---
> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> index 3392153dd0f1..c71d6aa6137a 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> @@ -32,14 +32,12 @@ cpus {
> ddrc_cache_lo: memory@80000000 {
> device_type = "memory";
> reg = <0x0 0x80000000 0x0 0x2e000000>;
> - clocks = <&clkcfg CLK_DDRC>;
> status = "okay";
> };
>
> ddrc_cache_hi: memory@1000000000 {
> device_type = "memory";
> reg = <0x10 0x0 0x0 0x40000000>;
> - clocks = <&clkcfg CLK_DDRC>;
> status = "okay";
> };
> };
>
