The RZ/V2M SoC has an additional clock to access the registers. The HW
manual says this clock should not be touched as it is used by the
"ISP Firmware".
Signed-off-by: Phil Edworthy <phil.edworthy@xxxxxxxxxxx>
---
v3:
- New patch added
---
.../bindings/serial/renesas,em-uart.yaml | 32 +++++++++++++++----
1 file changed, 25 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml b/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml
index 332c385618e1..8d0e779d7d77 100644
--- a/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml
@@ -9,9 +9,6 @@ title: Renesas EMMA Mobile UART Interface
maintainers:
- Magnus Damm <magnus.damm@xxxxxxxxx>
-allOf:
- - $ref: serial.yaml#
-
properties:
compatible:
oneOf:
@@ -29,11 +26,32 @@ properties:
interrupts:
maxItems: 1
- clocks:
- maxItems: 1
+allOf:
+ - $ref: serial.yaml#
- clock-names:
- const: sclk
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a09g011-uart
+ then:
+ properties:
+ clocks:
+ items:
+ - description: UART functional clock
+ - description: Optional internal clock to access the registers
+ clock-names:
+ items:
+ - const: sclk
+ - const: pclk
+ else:
+ properties:
+ clocks:
+ items:
+ - description: UART functional clock
+ clock-names:
+ items:
+ - const: sclk
required:
- compatible
--
2.32.0
