The CPLD on MX8Menlo board is used to operate custom hardware, the CPLD content is compatible with previous M53Menlo CPLD, add the bindings. Signed-off-by: Marek Vasut <marex@xxxxxxx> Cc: Fabio Estevam <festevam@xxxxxxx> Cc: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx> Cc: Peng Fan <peng.fan@xxxxxxx> Cc: Rob Herring <robh+dt@xxxxxxxxxx> Cc: Shawn Guo <shawnguo@xxxxxxxxxx> Cc: NXP Linux Team <linux-imx@xxxxxxx> Cc: devicetree@xxxxxxxxxxxxxxx To: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx --- NOTE: Depends on https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=for-next&id=b61b76dfef30945f175d4acfecb9beb862174f01 --- arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts index c20db0c550da..92eaf4ef4563 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts @@ -71,7 +71,20 @@ canfd: can@0 { &ecspi2 { pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_gpio1>; cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, <&gpio3 4 GPIO_ACTIVE_LOW>; - status = "disabled"; + status = "okay"; + + spidev@0 { + compatible = "menlo,m53cpld"; + reg = <0>; + spi-max-frequency = <25000000>; + }; + + spidev@1 { + compatible = "menlo,m53cpld"; + reg = <1>; + spi-max-frequency = <25000000>; + }; + }; ðphy0 { -- 2.35.1