With the current range specified for the CPU interface there is an
error message at boot:
GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set
Setting irqchip.gicv2_force_probe=1 in bootargs results in:
GIC: Aliased GICv2 at 0x0000000010320000, trying to find the canonical range over 128kB
GIC: Adjusting CPU interface base to 0x000000001032f000
GIC: Using split EOI/Deactivate mode
Using the adjusted CPU interface base and 8K size results in only the
final line remaining and fully working system as well as /proc/interrupts
showing additional IPI3,4,5,6:
IPI3: 0 0 CPU stop (for crash dump) interrupts
IPI4: 0 0 Timer broadcast interrupts
IPI5: 0 0 IRQ work interrupts
IPI6: 0 0 CPU wake-up interrupts
Signed-off-by: Daniel Golle <daniel@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 8c2563a3919a40..759803c2ce1577 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -332,7 +332,7 @@ gic: interrupt-controller@10300000 {
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0 0x10310000 0 0x1000>,
- <0 0x10320000 0 0x1000>,
+ <0 0x1032f000 0 0x2000>,
<0 0x10340000 0 0x2000>,
<0 0x10360000 0 0x2000>;
};
--
2.36.0
