Hi Phil,
On Fri, Apr 22, 2022 at 1:29 PM Phil Edworthy <phil.edworthy@xxxxxxxxxxx> wrote:
> On 20 April 2022 22:13 Geert Uytterhoeven wrote:
> > On Wed, Mar 30, 2022 at 5:41 PM Phil Edworthy wrote:
> > > Define RZ/V2M (R9A09G011) Clock Pulse Generator core clocks, module
> > clock
> >
> > The definitions contain no core clocks, only module clocks and resets?
> > Perhaps you will need a core clock for the Ethernet reference clock,
> > like on RZ/G2L?
> It looks like rz/v2m has a gate for every clock, so no need for any core
> clocks.
OK. Then please remove "core clock," from the patch description.
> > > outputs (CPG_CLK_ON* registers), and reset definitions (CPG_RST_*
> > > registers) in Section 48.5 ("Register Description") of the RZ/V2M
> > Hardware
> > > User's Manual (Rev. 1.10, Sep. 2021).
> > >
> > > Signed-off-by: Phil Edworthy <phil.edworthy@xxxxxxxxxxx>
> > > --- /dev/null
> > > +++ b/include/dt-bindings/clock/r9a09g011-cpg.h
> > > +#define R9A09G011_IIC01_PCLK 79
> >
> > IIC0_PCLK?
> There are four IIC peripherals, this pclk if for iic0 and iic1.
I know.
> Would IIC0_1_PCLK be a better name for this?
>
> > > +#define R9A09G011_IIC23_PCLK 89
> > IIC1_PCLK?
> and IIC2_3_PCLK?
Well, IIC0_PCLK andIIC1_PCLK match the Hardware Manual.
BTW, for resets, they avoided the confusion by naming the groups
A and B, instead of 0 and 1.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
