Hi Rex, Rex-BC Chen <rex-bc.chen@xxxxxxxxxxxx> writes: > From: Jia-Wei Chang <jia-wei.chang@xxxxxxxxxxxx> > > In some MediaTek SoCs, like MT8183, CPU and CCI share the same power > supplies. Cpufreq needs to check if CCI devfreq exists and wait until > CCI devfreq ready before scaling frequency. > > Before CCI devfreq is ready, we record the voltage when booting to > kernel and use the max(cpu target voltage, booting voltage) to > prevent cpufreq adjust to the lower voltage which will cause the CCI > crash because of high frequency and low voltage. > > - Add is_ccifreq_ready() to link CCI device to CPI, and CPU will start > DVFS when CCI is ready. > - Add platform data for MT8183. > > Signed-off-by: Jia-Wei Chang <jia-wei.chang@xxxxxxxxxxxx> > Signed-off-by: Rex-BC Chen <rex-bc.chen@xxxxxxxxxxxx> The solution of keeping the max of the CPU voltage from OPP and boot-up voltage makes sense until CCI is ready. Thank you for the rework and the detailed technical explanations. Reviewed-by: Kevin Hilman <khilman@xxxxxxxxxxxx> Kevin
