On 18-04-22, 19:12, Manivannan Sadhasivam wrote:
> On Mon, Apr 18, 2022 at 06:28:41PM +0530, Vinod Koul wrote:
> > Add support for onboard MCP2517FD SPI CAN transceiver attached to
> > SPI0 of RB3.
> >
> > Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 23 ++++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> > index 28fe45c5d516..5179f8ddb060 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> > +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> > @@ -28,6 +28,13 @@ chosen {
> > stdout-path = "serial0:115200n8";
> > };
> >
> > + /* Fixed crystal oscillator dedicated to MCP2517FD */
> > + clk40M: can_clock {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <40000000>;
> > + };
> > +
> > dc12v: dc12v-regulator {
> > compatible = "regulator-fixed";
> > regulator-name = "DC12V";
> > @@ -746,6 +753,22 @@ codec {
> > };
> > };
> >
> > +&spi0 {
> > + /* On Low speed expansion */
>
> Only SPI2 is exposed on the LS header. This one is dedicated to CAN controller.
ok
>
> > + status = "okay";
>
> No chip select? Since CAN controller may operate at higher frequencies, it
> makes sense to increase the drive strength of the pins.
Okay will add and send v2
--
~Vinod
