Hi Philipp: > -----Original Message----- > From: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> > Sent: 2022年4月4日 17:34 > To: Hongxing Zhu <hongxing.zhu@xxxxxxx>; l.stach@xxxxxxxxxxxxxx; > bhelgaas@xxxxxxxxxx; lorenzo.pieralisi@xxxxxxx; robh@xxxxxxxxxx; > shawnguo@xxxxxxxxxx; vkoul@xxxxxxxxxx; alexander.stein@xxxxxxxxxxxxxxx > Cc: linux-phy@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; > linux-pci@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx; kernel@xxxxxxxxxxxxxx; dl-linux-imx > <linux-imx@xxxxxxx> > Subject: Re: [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST > support > > Hi Richard, > > On Mo, 2022-03-07 at 17:07 +0800, Richard Zhu wrote: > > Add the i.MX8MP PCIe PHY PERST support. > > > > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx> > > --- > > drivers/reset/reset-imx7.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c > > index 185a333df66c..d2408725eb2c 100644 > > --- a/drivers/reset/reset-imx7.c > > +++ b/drivers/reset/reset-imx7.c > > @@ -329,6 +329,7 @@ static int imx8mp_reset_set(struct > > reset_controller_dev *rcdev, > > break; > > > > case IMX8MP_RESET_PCIE_CTRL_APPS_EN: > > + case IMX8MP_RESET_PCIEPHY_PERST: > > value = assert ? 0 : bit; > > break; > > } > > This doesn't do what the commit description says. > > The PCIEPHY_PERST bit is already supported by the driver (albeit > incorrectly?) - this patch just inverts the bit. > > Since this bit is not inverted on the other platforms, and the i.MX8MP > reference manual says nothing about this, please explicitly state why this > needs to be inverted and call it a fix in the commit description. Thanks for your comments, and sorry for replying late. I didn't get more details about this bit difference between i.MX8MP and others. Let me consult with design team again, and back to you later. Best Regards Richard Zhu > > regards > Philipp
