Re: [PATCH 11/11] arm64: dts: Add Pensando Elba SoC support

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On 2022-04-07 00:36, Brad Larson wrote:
Add Pensando common and Elba SoC specific device nodes

Signed-off-by: Brad Larson <brad@xxxxxxxxxxx>
---
Change from V3:
- Changed to dual copyright (GPL-2.0+ OR MIT)
- Minor changes from review input

 arch/arm64/boot/dts/Makefile                  |   1 +
 arch/arm64/boot/dts/pensando/Makefile         |   3 +
 arch/arm64/boot/dts/pensando/elba-16core.dtsi | 189 ++++++++++++++++++
 .../boot/dts/pensando/elba-asic-common.dtsi   |  98 +++++++++
 arch/arm64/boot/dts/pensando/elba-asic.dts    |  28 +++
 .../boot/dts/pensando/elba-flash-parts.dtsi   | 106 ++++++++++
 arch/arm64/boot/dts/pensando/elba.dtsi        | 189 ++++++++++++++++++
 7 files changed, 614 insertions(+)
 create mode 100644 arch/arm64/boot/dts/pensando/Makefile
 create mode 100644 arch/arm64/boot/dts/pensando/elba-16core.dtsi
 create mode 100644 arch/arm64/boot/dts/pensando/elba-asic-common.dtsi
 create mode 100644 arch/arm64/boot/dts/pensando/elba-asic.dts
 create mode 100644 arch/arm64/boot/dts/pensando/elba-flash-parts.dtsi
 create mode 100644 arch/arm64/boot/dts/pensando/elba.dtsi


[...]

diff --git a/arch/arm64/boot/dts/pensando/elba.dtsi
b/arch/arm64/boot/dts/pensando/elba.dtsi
new file mode 100644
index 000000000000..10e06eb8cda6
--- /dev/null
+++ b/arch/arm64/boot/dts/pensando/elba.dtsi

[...]

+		gic: interrupt-controller@800000 {
+			compatible = "arm,gic-v3";
+			#interrupt-cells = <3>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+			interrupt-controller;
+			reg = <0x0 0x800000 0x0 0x200000>,	/* GICD */
+			      <0x0 0xa00000 0x0 0x200000>;	/* GICR */

You are still missing the GICV and GICH regions that are
provided by the CPU. I already pointed that out in [1].

The Cortex-A72 TRM will tell you where to find them (at
an offset from PERIPHBASE).

Please fix this.

        M.

[1] https://lore.kernel.org/all/a20805de16e1196c2ed46dd949473c9a@xxxxxxxxxx
--
Jazz is not dead. It just smells funny...



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