Re: [PATCH 2/7] arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins

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On Thu, Mar 31, 2022 at 3:27 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> On Tue, Mar 15, 2022 at 4:59 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > Add scif0 and audio clk pins to soc pinctrl dtsi and drop deleting
>
> Serial and audio: sounds (pun intended) like a strange combination? ;-)
>
> > the pinctrl-0 and pinctrl-names properties for scif0 node so that
> > we now actually make use of these properties for scif0.
> >
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
> LGTM...
>
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
> > @@ -0,0 +1,24 @@
> > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +/*
> > + * Device Tree Source for the RZ/G2UL SMARC pincontrol parts
> > + *
> > + * Copyright (C) 2022 Renesas Electronics Corp.
> > + */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > +
> > +&pinctrl {
> > +       pinctrl-0 = <&sound_clk_pins>;
> > +       pinctrl-names = "default";
> > +
> > +       scif0_pins: scif0 {
> > +               pinmux = <RZG2L_PORT_PINMUX(6, 4, 6)>, /* TxD */
> > +                        <RZG2L_PORT_PINMUX(6, 3, 6)>; /* RxD */
>
> ... but I cannot review the pin muxing yet, due to lack of documentation
> (SOM schematics).

Fixed, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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