Add scif0 and audio clk pins to soc pinctrl dtsi and drop deleting
the pinctrl-0 and pinctrl-names properties for scif0 node so that
we now actually make use of these properties for scif0.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
.../boot/dts/renesas/r9a07g043u11-smarc.dts | 6 +----
.../dts/renesas/rzg2ul-smarc-pinfunction.dtsi | 24 +++++++++++++++++++
2 files changed, 25 insertions(+), 5 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
index aaa29f83e84c..64370faf8f6d 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "r9a07g043.dtsi"
#include "rzg2ul-smarc-som.dtsi"
+#include "rzg2ul-smarc-pinfunction.dtsi"
#include "rz-smarc-common.dtsi"
/ {
@@ -73,11 +74,6 @@
status = "disabled";
};
-&scif0 {
- /delete-property/ pinctrl-0;
- /delete-property/ pinctrl-names;
-};
-
&sdhi1 {
/delete-property/ pinctrl-0;
/delete-property/ pinctrl-1;
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
new file mode 100644
index 000000000000..2db9c92cf01f
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the RZ/G2UL SMARC pincontrol parts
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&pinctrl {
+ pinctrl-0 = <&sound_clk_pins>;
+ pinctrl-names = "default";
+
+ scif0_pins: scif0 {
+ pinmux = <RZG2L_PORT_PINMUX(6, 4, 6)>, /* TxD */
+ <RZG2L_PORT_PINMUX(6, 3, 6)>; /* RxD */
+ };
+
+ sound_clk_pins: sound_clk {
+ pins = "AUDIO_CLK1", "AUDIO_CLK2";
+ input-enable;
+ };
+};
--
2.17.1
