On 04.03.2022 17:35, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add all the remaining usart nodes for the flexcom block. Although the
> DMA channels are specified, DMA is not enabled by default because break
> detection doesn't work with DMA.
>
> Keep the nodes disabled by default.
>
> Signed-off-by: Michael Walle <michael@xxxxxxxx>
Reviewed-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/lan966x.dtsi | 52 ++++++++++++++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 230de3bdd5f1..d7eacb0144f5 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -92,6 +92,19 @@ flx0: flexcom@e0040000 {
> #size-cells = <1>;
> ranges = <0x0 0xe0040000 0x800>;
> status = "disabled";
> +
> + usart0: serial@200 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
> + <&dma0 AT91_XDMAC_DT_PERID(2)>;
> + dma-names = "tx", "rx";
> + clocks = <&nic_clk>;
> + clock-names = "usart";
> + atmel,fifo-size = <32>;
> + status = "disabled";
> + };
> };
>
> flx1: flexcom@e0044000 {
> @@ -102,6 +115,19 @@ flx1: flexcom@e0044000 {
> #size-cells = <1>;
> ranges = <0x0 0xe0044000 0x800>;
> status = "disabled";
> +
> + usart1: serial@200 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
> + <&dma0 AT91_XDMAC_DT_PERID(4)>;
> + dma-names = "tx", "rx";
> + clocks = <&nic_clk>;
> + clock-names = "usart";
> + atmel,fifo-size = <32>;
> + status = "disabled";
> + };
> };
>
> trng: rng@e0048000 {
> @@ -129,6 +155,19 @@ flx2: flexcom@e0060000 {
> #size-cells = <1>;
> ranges = <0x0 0xe0060000 0x800>;
> status = "disabled";
> +
> + usart2: serial@200 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
> + <&dma0 AT91_XDMAC_DT_PERID(6)>;
> + dma-names = "tx", "rx";
> + clocks = <&nic_clk>;
> + clock-names = "usart";
> + atmel,fifo-size = <32>;
> + status = "disabled";
> + };
> };
>
> flx3: flexcom@e0064000 {
> @@ -181,6 +220,19 @@ flx4: flexcom@e0070000 {
> #size-cells = <1>;
> ranges = <0x0 0xe0070000 0x800>;
> status = "disabled";
> +
> + usart4: serial@200 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
> + <&dma0 AT91_XDMAC_DT_PERID(10)>;
> + dma-names = "tx", "rx";
> + clocks = <&nic_clk>;
> + clock-names = "usart";
> + atmel,fifo-size = <32>;
> + status = "disabled";
> + };
> };
>
> timer0: timer@e008c000 {
> --
> 2.30.2
>
