On 25.03.2022 17:27, Mark Brown wrote:
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>
> The MCLK of the WM8731 on the AT91SAM9G20-EK board is connected to the
> PCK0 output of the SoC and is expected to be set to 12MHz. Previously
> this was mapped using pre-common clock API calls in the audio machine
> driver but the conversion to the common clock framework broke that so
> describe things in the DT instead.
>
> Fixes: ff78a189b0ae55f ("ARM: at91: remove old at91-specific clock driver")
> Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
Reviewed-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> index 87bb39060e8b..ca03685f0f08 100644
> --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
> @@ -219,6 +219,12 @@ i2c-gpio-0 {
> wm8731: wm8731@1b {
> compatible = "wm8731";
> reg = <0x1b>;
> +
> + /* PCK0 at 12MHz */
> + clocks = <&pmc PMC_TYPE_SYSTEM 8>;
> + clock-names = "mclk";
> + assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>;
> + assigned-clock-rates = <12000000>;
> };
> };
>
> --
> 2.30.2
>
