On Tue, Sep 09, 2014 at 01:09:27PM -0400, Murali Karicheri wrote: > On 09/09/2014 12:55 PM, Mark Brown wrote: > >On Tue, Sep 09, 2014 at 07:07:31PM +0300, Grygorii Strashko wrote: > >>- ti,spi-c2t-delay: Chip-select-active-to-transmit-start delay > >> (SPIDELAY.C2TDELAY) > >>- ti,spi-t2c-delay: Transmit-end-to-chip-select-inactive delay > >> (SPIDELAY.T2CDELAY) > >Now I look at these they look very much like the standard delay feature > >that the SPI subsystem has already - are they? > As Grygorii explained in previous postings (reproduced below), these delays > are handled by the SPI hardware on Keystone and affect the delay between > successive word tranmssion and has nothing to do with the delay you are > talking about. Isn't the standard delay you mention here is between > successive packets send down to the lower level driver (in this case > spi-davinci.c) ? He talked about such delays between words (and there were some other delays listed which seemed to meet that description) but the above don't appear to refer to them, the above refer to delays around chip select which most definitely are covered with the standard delays. If these delays are not related to chip select then the documentation needs to be fixed to not refer to chip select.
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