On Thu, Mar 17, 2022 at 11:58:43PM +0100, Linus Walleij wrote: > The CSR GSD4t is a CSR product using the SiRFstarIV core, and > the CSR CSRG05TA03-ICJE-R is a CSR product using the SiRFstarV > core. > > These chips have a SRESETN line that can be pulled low to hard > reset the chip and in some designs this is connected to a GPIO, > so add this as an optional property. > > Update the example with a reset line so users see that it need > to be tagged as active low. > > Cc: devicetree@xxxxxxxxxxxxxxx > Cc: Krzysztof Kozlowski <krzk@xxxxxxxxxx> > Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx> > --- > ChangeLog v1->v2: > - Add maxItems: 1 to the reset-gpios > --- > Documentation/devicetree/bindings/gnss/sirfstar.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) Applied, thanks.
