On Fri, Mar 18, 2022 at 09:13:24PM +0100, Michael Walle wrote:
> The LAN966x has two internal PHYs which are in reset by default. The
> driver already supported the internal PHYs of the SparX-5. Now add
> support for the LAN966x, too. Add a new compatible to distinguish them.
>
> The LAN966x has additional control bits in this register, thus convert
> the regmap_write() to regmap_update_bits() to leave the remaining bits
> untouched. This doesn't change anything for the SparX-5 SoC, because
> there, the register consists only of reset bits.
>
> Signed-off-by: Michael Walle <michael@xxxxxxxx>
Reviewed-by: Andrew Lunn <andrew@xxxxxxx>
Andrew
