Il 04/03/22 14:08, Allen-KH Cheng ha scritto:
Add dsi ndoe for mt8192 SoC.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 94f88e52776b..3d16cb0b3ea1 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -1327,6 +1327,20 @@
clocks = <&mmsys CLK_MM_DISP_DITHER0>;
};
+ dsi0: dsi@14010000 {
+ compatible = "mediatek,mt8183-dsi";
+ reg = <0 0x14010000 0 0x1000>;
+ interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
+ mediatek,syscon-dsi = <&mmsys 0x140>;
mediatek,syscon-dsi does not exist upstream: here we have proper reset controller
support.
+ clocks = <&mmsys CLK_MM_DSI0>,
+ <&mmsys CLK_MM_DSI_DSI0>,
+ <&mipi_tx0>;
+ clock-names = "engine", "digital", "hs";
+ phys = <&mipi_tx0>;
+ phy-names = "dphy";
On MT8183, we do....
resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
...so you need to simply replicate for MT8192. Please do.
+ status = "disabled";
+ };
+
ovl_2l2: ovl@14014000 {
compatible = "mediatek,mt8192-disp-ovl-2l";
reg = <0 0x14014000 0 0x1000>;
