RE: [PATCH v3 1/2] dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root Port

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> On 09/03/2022 13:00, Bharat Kumar Gogada wrote:
> > Xilinx Versal Premium series has CPM5 block which supports Root Port
> > functioning at Gen5 speed.
> >
> > Add support for YAML schemas documentation for Versal CPM5 Root Port
> driver.
> >
> > Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xxxxxxxxxx>
> > ---
> >  .../bindings/pci/xilinx-versal-cpm.yaml       | 47 ++++++++++++++++---
> >  1 file changed, 40 insertions(+), 7 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > index 32f4641085bc..97c7229d7f91 100644
> > --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > @@ -14,17 +14,21 @@ allOf:
> >
> >  properties:
> >    compatible:
> > -    const: xlnx,versal-cpm-host-1.00
> > +    contains:
> > +      enum:
> > +        - xlnx,versal-cpm-host-1.00
> > +        - xlnx,versal-cpm5-host-1.00
> >
> >    reg:
> > -    items:
> > -      - description: Configuration space region and bridge registers.
> > -      - description: CPM system level control and status registers.
> > +    description: |
> > +      Should contain cpm_slcr, cfg registers location and length.
> > +      For xlnx,versal-cpm5-host-1.00, it should also contain cpm_csr.
> > +    minItems: 2
> > +    maxItems: 3
> 
> You removed here list of items, which should stay. See also
> https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bi
> ndings/example-schema.yaml#L91
> how to do it.
> 
> >
> >    reg-names:
> > -    items:
> > -      - const: cfg
> > -      - const: cpm_slcr
> > +    minItems: 2
> > +    maxItems: 3
> 
> The same.
> 
> 
Thanks Krzysztof, will fix this in next patch.




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