Hi ALain
On 2/11/22 19:16, Alain Volmat wrote:
> Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section.
> Since they are controlled via syscfg, there is no reg property needed,
> which is required when having the node within the soc section.
>
> Modification is done within stih410.dtsi and within related board
> dts files (stih410-b2120.dts, stih410-b2260.dts).
>
> Signed-off-by: Alain Volmat <avolmat@xxxxxx>
> ---
> v2: squash together 3 commits from v1 to avoid compilation issues
>
> arch/arm/boot/dts/stih410-b2120.dts | 16 +++++------
> arch/arm/boot/dts/stih410-b2260.dts | 16 +++++------
> arch/arm/boot/dts/stih410.dtsi | 42 ++++++++++++++---------------
> 3 files changed, 36 insertions(+), 38 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih410-b2120.dts b/arch/arm/boot/dts/stih410-b2120.dts
> index 9d3b118f5f0f..538ff98ca1b1 100644
> --- a/arch/arm/boot/dts/stih410-b2120.dts
> +++ b/arch/arm/boot/dts/stih410-b2120.dts
> @@ -24,6 +24,14 @@ aliases {
> ethernet0 = ðernet0;
> };
>
> + usb2_picophy1: phy2 {
> + status = "okay";
> + };
> +
> + usb2_picophy2: phy3 {
> + status = "okay";
> + };
> +
> soc {
>
> mmc0: sdhci@9060000 {
> @@ -33,14 +41,6 @@ mmc0: sdhci@9060000 {
> sd-uhs-ddr50;
> };
>
> - usb2_picophy1: phy2@0 {
> - status = "okay";
> - };
> -
> - usb2_picophy2: phy3@0 {
> - status = "okay";
> - };
> -
> ohci0: usb@9a03c00 {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/stih410-b2260.dts b/arch/arm/boot/dts/stih410-b2260.dts
> index c2d3b6de55d0..26d93f26f6d0 100644
> --- a/arch/arm/boot/dts/stih410-b2260.dts
> +++ b/arch/arm/boot/dts/stih410-b2260.dts
> @@ -82,6 +82,14 @@ phy_port1: port@9b2a000 {
> };
> };
>
> + usb2_picophy1: phy2 {
> + status = "okay";
> + };
> +
> + usb2_picophy2: phy3 {
> + status = "okay";
> + };
> +
> soc {
> /* Low speed expansion connector */
> uart0: serial@9830000 {
> @@ -152,14 +160,6 @@ pwm1: pwm@9510000 {
> status = "okay";
> };
>
> - usb2_picophy1: phy2@0 {
> - status = "okay";
> - };
> -
> - usb2_picophy2: phy3@0 {
> - status = "okay";
> - };
> -
> ohci0: usb@9a03c00 {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
> index fe83d9a522bf..ce2f62cf129b 100644
> --- a/arch/arm/boot/dts/stih410.dtsi
> +++ b/arch/arm/boot/dts/stih410.dtsi
> @@ -12,31 +12,29 @@ aliases {
> bdisp0 = &bdisp0;
> };
>
> - soc {
> - usb2_picophy1: phy2@0 {
> - compatible = "st,stih407-usb2-phy";
> - reg = <0 0>;
> - #phy-cells = <0>;
> - st,syscfg = <&syscfg_core 0xf8 0xf4>;
> - resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
> - <&picophyreset STIH407_PICOPHY0_RESET>;
> - reset-names = "global", "port";
> + usb2_picophy1: phy2 {
> + compatible = "st,stih407-usb2-phy";
> + #phy-cells = <0>;
> + st,syscfg = <&syscfg_core 0xf8 0xf4>;
> + resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
> + <&picophyreset STIH407_PICOPHY0_RESET>;
> + reset-names = "global", "port";
> +
> + status = "disabled";
> + };
>
> - status = "disabled";
> - };
> + usb2_picophy2: phy3 {
> + compatible = "st,stih407-usb2-phy";
> + #phy-cells = <0>;
> + st,syscfg = <&syscfg_core 0xfc 0xf4>;
> + resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
> + <&picophyreset STIH407_PICOPHY1_RESET>;
> + reset-names = "global", "port";
>
> - usb2_picophy2: phy3@0 {
> - compatible = "st,stih407-usb2-phy";
> - reg = <0 0>;
> - #phy-cells = <0>;
> - st,syscfg = <&syscfg_core 0xfc 0xf4>;
> - resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
> - <&picophyreset STIH407_PICOPHY1_RESET>;
> - reset-names = "global", "port";
> -
> - status = "disabled";
> - };
> + status = "disabled";
> + };
>
> + soc {
> ohci0: usb@9a03c00 {
> compatible = "st,st-ohci-300x";
> reg = <0x9a03c00 0x100>;
Reviewed-by: Patrice Chotard <patrice.chotard@xxxxxxxxxxx>
Thanks
Patrice
