On Sun, 06 Feb 2022 17:41:51 +0100, Sander Vanheule wrote: > The interrupt router has 32 inputs, and up to 15 outputs connected to > the MIPS CPU's interrupts. The way these are mapped to each other is > runtime configurable. This controller can also mask individual interrupt > sources, and has a status register to indicate pending interrupts. This > means the controller is not transparent, and the use of "interrupt-map" > inappropriate. Instead, a list of parent interrupts should be specified. > > Two-part compatibles are introduced to be able to require "interrupts" > for new devicetrees. The relevant descriptions are extended or added to > more clearly describe the functionality of this controller. The old > compatible, with "interrupt-map" and "#address-cells", is deprecated. > Interrupt specifiers for new compatibles will require two cells, to > indicate the output selection. > > To prevent spurious changes to the binding when more SoCs are added, > "allOf" is used with one "if", and the compatible enum only has one > item. > > The example is updated to provide a correct example for RTL8380 SoCs. > > Signed-off-by: Sander Vanheule <sander@xxxxxxxxxxxxx> > --- > Changes in v4: > - Indicate more clearly that the controller is not transparent. > --- > .../realtek,rtl-intc.yaml | 82 ++++++++++++++----- > 1 file changed, 62 insertions(+), 20 deletions(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
