Sat, 30 Aug 2014 15:22:12 +0200 от Philippe Reynes <tremyfr@xxxxxxxxx>: > > Signed-off-by: Philippe Reynes <tremyfr@xxxxxxxxx> > --- > arch/arm/boot/dts/imx27-apf27dev.dts | 20 ++++++++++++++++++++ > 1 files changed, 20 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts b/arch/arm/boot/dts/imx27-apf27dev.dts > index b982309..25b9ecd 100644 > --- a/arch/arm/boot/dts/imx27-apf27dev.dts > +++ b/arch/arm/boot/dts/imx27-apf27dev.dts > @@ -82,6 +82,19 @@ > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>; > status = "okay"; > + > + adc@0 { > + compatible = "maxim,max1027"; > + reg = <0>; > + interrupt-parent = <&gpio5>; > + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_max1027>; > + /* SPI mode = 0 */ > + spi-cpol = <0>; > + spi-cpha = <0>; Mode0 is default. Afaik you not need to specify SPOL & SPHA for this. Is not it? --- ��.n��������+%������w��{.n����z�{��ܨ}���Ơz�j:+v�����w����ޙ��&�)ߡ�a����z�ޗ���ݢj��w�f