Re: [PATCH V1 3/6] iio: accel: sca3300: modified to support multi chips

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Hi LI,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on jic23-iio/togreg]
[also build test WARNING on v5.17-rc1 next-20220124]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/LI-Qingwu/i-iio-accel-sca3300-add-compitible-for-scl3300/20220124-174021
base:   https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg
config: parisc-randconfig-r015-20220124 (https://download.01.org/0day-ci/archive/20220124/202201242336.1dSTFe7a-lkp@xxxxxxxxx/config)
compiler: hppa-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/7dc3bc68cdfcb252dd79fea28a5e944d76784fe8
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review LI-Qingwu/i-iio-accel-sca3300-add-compitible-for-scl3300/20220124-174021
        git checkout 7dc3bc68cdfcb252dd79fea28a5e944d76784fe8
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=parisc SHELL=/bin/bash drivers/iio/accel/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All warnings (new ones prefixed by >>):

   drivers/iio/accel/sca3300.c:74:60: error: macro "IIO_ENUM_AVAILABLE" requires 3 arguments, but only 2 given
      74 |         IIO_ENUM_AVAILABLE("op_mode", &sca3300_op_mode_enum),
         |                                                            ^
   In file included from include/linux/iio/buffer.h:10,
                    from drivers/iio/accel/sca3300.c:17:
   include/linux/iio/iio.h:112: note: macro "IIO_ENUM_AVAILABLE" defined here
     112 | #define IIO_ENUM_AVAILABLE(_name, _shared, _e) \
         | 
   drivers/iio/accel/sca3300.c:74:9: error: 'IIO_ENUM_AVAILABLE' undeclared here (not in a function)
      74 |         IIO_ENUM_AVAILABLE("op_mode", &sca3300_op_mode_enum),
         |         ^~~~~~~~~~~~~~~~~~
>> drivers/iio/accel/sca3300.c:185:31: warning: initialization of 'long unsigned int' from 'const long unsigned int *' makes integer from pointer without a cast [-Wint-conversion]
     185 |                 .scan_masks = sca3300_scan_masks,
         |                               ^~~~~~~~~~~~~~~~~~
   drivers/iio/accel/sca3300.c:185:31: note: (near initialization for 'sca3300_chip_info_tbl[0].scan_masks')
   drivers/iio/accel/sca3300.c: In function 'sca3300_write_raw':
>> drivers/iio/accel/sca3300.c:307:34: warning: comparison between pointer and integer
     307 |                         if ((val == sca3300_accel_scale[data->chip_info->chip_type][0]) &&
         |                                  ^~
   drivers/iio/accel/sca3300.c:308:35: warning: comparison between pointer and integer
     308 |                             (val2 == sca3300_accel_scale[data->chip_info->chip_type][1]))
         |                                   ^~
   drivers/iio/accel/sca3300.c: In function 'sca3300_init':
>> drivers/iio/accel/sca3300.c:422:57: warning: assignment to 'const long unsigned int *' from 'long unsigned int' makes pointer from integer without a cast [-Wint-conversion]
     422 |                         indio_dev->available_scan_masks = sca3300_chip_info_tbl[i].scan_masks;
         |                                                         ^


vim +185 drivers/iio/accel/sca3300.c

   177	
   178	static const struct sca3300_chip_info sca3300_chip_info_tbl[] = {
   179		[CHIP_SCA3300] = {
   180			.chip_type = CHIP_SCA3300,
   181			.name = "sca3300",
   182			.chip_id = 0x51,
   183			.channels = sca3300_channels,
   184			.num_channels = ARRAY_SIZE(sca3300_channels),
 > 185			.scan_masks = sca3300_scan_masks,
   186		},
   187	};
   188	
   189	DECLARE_CRC8_TABLE(sca3300_crc_table);
   190	
   191	static int sca3300_transfer(struct sca3300_data *sca_data, int *val)
   192	{
   193		/* Consecutive requests min. 10 us delay (Datasheet section 5.1.2) */
   194		struct spi_delay delay = { .value = 10, .unit = SPI_DELAY_UNIT_USECS };
   195		int32_t ret;
   196		int rs;
   197		u8 crc;
   198		struct spi_transfer xfers[2] = {
   199			{
   200				.tx_buf = sca_data->txbuf,
   201				.len = ARRAY_SIZE(sca_data->txbuf),
   202				.delay = delay,
   203				.cs_change = 1,
   204			},
   205			{
   206				.rx_buf = sca_data->rxbuf,
   207				.len = ARRAY_SIZE(sca_data->rxbuf),
   208				.delay = delay,
   209			}
   210		};
   211	
   212		/* inverted crc value as described in device data sheet */
   213		crc = ~crc8(sca3300_crc_table, &sca_data->txbuf[0], 3, CRC8_INIT_VALUE);
   214		sca_data->txbuf[3] = crc;
   215	
   216		ret = spi_sync_transfer(sca_data->spi, xfers, ARRAY_SIZE(xfers));
   217		if (ret) {
   218			dev_err(&sca_data->spi->dev,
   219				"transfer error, error: %d\n", ret);
   220			return -EIO;
   221		}
   222	
   223		crc = ~crc8(sca3300_crc_table, &sca_data->rxbuf[0], 3, CRC8_INIT_VALUE);
   224		if (sca_data->rxbuf[3] != crc) {
   225			dev_err(&sca_data->spi->dev, "CRC checksum mismatch");
   226			return -EIO;
   227		}
   228	
   229		/* get return status */
   230		rs = sca_data->rxbuf[0] & SCA3300_MASK_RS_STATUS;
   231		if (rs == SCA3300_VALUE_RS_ERROR)
   232			ret = -EINVAL;
   233	
   234		*val = sign_extend32(get_unaligned_be16(&sca_data->rxbuf[1]), 15);
   235	
   236		return ret;
   237	}
   238	
   239	static int sca3300_error_handler(struct sca3300_data *sca_data)
   240	{
   241		int ret;
   242		int val;
   243	
   244		mutex_lock(&sca_data->lock);
   245		sca_data->txbuf[0] = SCA3300_REG_STATUS << 2;
   246		ret = sca3300_transfer(sca_data, &val);
   247		mutex_unlock(&sca_data->lock);
   248		/*
   249		 * Return status error is cleared after reading status register once,
   250		 * expect EINVAL here.
   251		 */
   252		if (ret != -EINVAL) {
   253			dev_err(&sca_data->spi->dev,
   254				"error reading device status: %d\n", ret);
   255			return ret;
   256		}
   257	
   258		dev_err(&sca_data->spi->dev, "device status: 0x%lx\n",
   259			val & SCA3300_STATUS_MASK);
   260	
   261		return 0;
   262	}
   263	
   264	static int sca3300_read_reg(struct sca3300_data *sca_data, u8 reg, int *val)
   265	{
   266		int ret;
   267	
   268		mutex_lock(&sca_data->lock);
   269		sca_data->txbuf[0] = reg << 2;
   270		ret = sca3300_transfer(sca_data, val);
   271		mutex_unlock(&sca_data->lock);
   272		if (ret != -EINVAL)
   273			return ret;
   274	
   275		return sca3300_error_handler(sca_data);
   276	}
   277	
   278	static int sca3300_write_reg(struct sca3300_data *sca_data, u8 reg, int val)
   279	{
   280		int reg_val = 0;
   281		int ret;
   282	
   283		mutex_lock(&sca_data->lock);
   284		/* BIT(7) for write operation */
   285		sca_data->txbuf[0] = BIT(7) | (reg << 2);
   286		put_unaligned_be16(val, &sca_data->txbuf[1]);
   287		ret = sca3300_transfer(sca_data, &reg_val);
   288		mutex_unlock(&sca_data->lock);
   289		if (ret != -EINVAL)
   290			return ret;
   291	
   292		return sca3300_error_handler(sca_data);
   293	}
   294	
   295	static int sca3300_write_raw(struct iio_dev *indio_dev,
   296				     struct iio_chan_spec const *chan,
   297				     int val, int val2, long mask)
   298	{
   299		struct sca3300_data *data = iio_priv(indio_dev);
   300		int reg_val;
   301		int ret;
   302		int i;
   303	
   304		switch (mask) {
   305		case IIO_CHAN_INFO_SCALE:
   306			for (i = 0; i < OP_MOD_CNT; i++) {
 > 307				if ((val == sca3300_accel_scale[data->chip_info->chip_type][0]) &&
   308				    (val2 == sca3300_accel_scale[data->chip_info->chip_type][1]))
   309					return sca3300_write_reg(data, SCA3300_REG_MODE, i);
   310			}
   311			return -EINVAL;
   312		case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
   313			ret = sca3300_read_reg(data, SCA3300_REG_MODE, &reg_val);
   314			if (ret)
   315				return ret;
   316			/* freq. change is possible only for mode 3 and 4 */
   317			if (reg_val == 2 && val == sca3300_lp_freq[data->chip_info->chip_type][3])
   318				return sca3300_write_reg(data, SCA3300_REG_MODE, 3);
   319			if (reg_val == 3 && val == sca3300_lp_freq[data->chip_info->chip_type][2])
   320				return sca3300_write_reg(data, SCA3300_REG_MODE, 2);
   321			return -EINVAL;
   322		default:
   323			return -EINVAL;
   324		}
   325	}
   326	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx



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