On Thu, 2014-08-28 at 10:11 -0500, atull wrote: > On Wed, 27 Aug 2014, Weike Chen wrote: [] > > +static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset) > > +{ > > + struct bgpio_chip *bgc = &gpio->ports[0].bgc; > > + void __iomem *reg_base = gpio->regs; > > + > > + return bgc->read_reg(reg_base + offset); > > +} > > + > > +static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset, > > + u32 val) > > +{ > > + struct bgpio_chip *bgc = &gpio->ports[0].bgc; > > + void __iomem *reg_base = gpio->regs; > > + > > + bgc->write_reg(reg_base + offset, val); > > +} > > + > > Hello, > > I don't understand the reason for adding dwapb_read and dwapb_write here. > The rest of the driver is using readl and writel. I'd rather not see two > different methods being used in the same driver for register access. > Maybe I'm missing something, but if we need to add dwapb_read/write, then > it should be used for all register access. Alan, it was my proposal. I rather agree that is better to convert all accesses to that. -- Andy Shevchenko <andriy.shevchenko@xxxxxxxxx> Intel Finland Oy --------------------------------------------------------------------- Intel Finland Oy Registered Address: PL 281, 00181 Helsinki Business Identity Code: 0357606 - 4 Domiciled in Helsinki This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. ��.n��������+%������w��{.n����z�{��ܨ}���Ơz�j:+v�����w����ޙ��&�)ߡ�a����z�ޗ���ݢj��w�f