This patch adds mlp device to dtsi files for R-Car Gen3 SoCs that have it. Signed-off-by: Nikita Yushchenko <nikita.yoush@xxxxxxxxxxxxxxxxxx> --- v2: https://lore.kernel.org/lkml/20211226153349.2296024-1-nikita.yoush@xxxxxxxxxxxxxxxxxx/ Changes from v2: - no longer part of patchset - other parts already merged - add per-SoC compatible strings - add resets - keep only two interrupts - those used by the driver v1: https://lore.kernel.org/lkml/20211226082530.2245198-4-nikita.yoush@xxxxxxxxxxxxxxxxxx/ Changes from v1: - fix power domain ids so all dtbs build properly arch/arm64/boot/dts/renesas/r8a77951.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/renesas/r8a77960.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/renesas/r8a77961.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/renesas/r8a77965.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/renesas/r8a77990.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/renesas/r8a77995.dtsi | 12 ++++++++++++ 6 files changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi index 1768a3e6bb8d..d09f725a33f3 100644 --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi @@ -2412,6 +2412,18 @@ ssi9: ssi-9 { }; }; + mlp: mlp@ec520000 { + compatible = "renesas,r8a7795-mlp", + "renesas,rcar-gen3-mlp"; + reg = <0 0xec520000 0 0x800>; + interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 802>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 802>; + status = "disabled"; + }; + audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a7795", "renesas,rcar-dmac"; diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi index 2bd8169735d3..280ed4249dad 100644 --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi @@ -2284,6 +2284,18 @@ ssiu97: ssiu-51 { }; }; + mlp: mlp@ec520000 { + compatible = "renesas,r8a7796-mlp", + "renesas,rcar-gen3-mlp"; + reg = <0 0xec520000 0 0x800>; + interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 802>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 802>; + status = "disabled"; + }; + audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi index a34d5b1d6431..cd212628a910 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi @@ -2128,6 +2128,18 @@ ssiu97: ssiu-51 { }; }; + mlp: mlp@ec520000 { + compatible = "renesas,r8a77961-mlp", + "renesas,rcar-gen3-mlp"; + reg = <0 0xec520000 0 0x800>; + interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 802>; + power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; + resets = <&cpg 802>; + status = "disabled"; + }; + audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a77961", "renesas,rcar-dmac"; diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 08df75606430..c7e3ed0e0814 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -2147,6 +2147,18 @@ ssi9: ssi-9 { }; }; + mlp: mlp@ec520000 { + compatible = "renesas,r8a77965-mlp", + "renesas,rcar-gen3-mlp"; + reg = <0 0xec520000 0 0x800>; + interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 802>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 802>; + status = "disabled"; + }; + audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a77965", "renesas,rcar-dmac"; diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index 0ea300a8147d..f3ac5f087ba7 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -1682,6 +1682,18 @@ ssi9: ssi-9 { }; }; + mlp: mlp@ec520000 { + compatible = "renesas,r8a77990-mlp", + "renesas,rcar-gen3-mlp"; + reg = <0 0xec520000 0 0x800>; + interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 802>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 802>; + status = "disabled"; + }; + audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac"; diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 16ad5fc23a67..27b1b5e32175 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -1132,6 +1132,18 @@ ssi4: ssi-4 { }; }; + mlp: mlp@ec520000 { + compatible = "renesas,r8a77995-mlp", + "renesas,rcar-gen3-mlp"; + reg = <0 0xec520000 0 0x800>; + interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 802>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 802>; + status = "disabled"; + }; + audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a77995", "renesas,rcar-dmac"; -- 2.30.2
