Hi AngeloGioacchino,
Sorry for the late reply.
On Wed, 2021-10-20 at 17:20 +0200, AngeloGioacchino Del Regno wrote:
> Il 28/04/21 08:54, Roger Lu ha scritto:
> > add compitable/reg/irq/clock/efuse setting in svs node
> >
> > Signed-off-by: Roger Lu <roger.lu@xxxxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 18 ++++++++++++++++++
> > 1 file changed, 18 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > index 80519a145f13..441d617ece43 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> > @@ -657,6 +657,18 @@
> > status = "disabled";
> > };
> >
> > + svs: svs@1100b000 {
> > + compatible = "mediatek,mt8183-svs";
> > + reg = <0 0x1100b000 0 0x1000>;
> > + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&infracfg CLK_INFRA_THERM>;
> > + clock-names = "main";
> > + nvmem-cells = <&svs_calibration>,
> > + <&thermal_calibration>;
> > + nvmem-cell-names = "svs-calibration-data",
> > + "t-calibration-data";
> > + };
> > +
> > pwm0: pwm@1100e000 {
> > compatible = "mediatek,mt8183-disp-pwm";
> > reg = <0 0x1100e000 0 0x1000>;
> > @@ -941,9 +953,15 @@
> > reg = <0 0x11f10000 0 0x1000>;
> > #address-cells = <1>;
> > #size-cells = <1>;
> > + thermal_calibration: calib@180 {
> > + reg = <0x180 0xc>;
> > + };
> > mipi_tx_calibration: calib@190 {
> > reg = <0x190 0xc>;
> > };
> > + svs_calibration: calib@580 {
> > + reg = <0x580 0x64>;
> > + };
> > };
> >
> > u3phy: usb-phy@11f40000 {
> >
>
> This patch doesn't apply on the latest linux-next due to some new commits in
> mt8183.dtsi, can you please rebase?
Okay. I'll rebase it.
> Thanks,
> - Angelo
