Hello Rob, Mark, Tudor & Pratyush, Here is a fifth versions for these bindings, which applies on top of Pratyush's work: https://lore.kernel.org/all/20211109181911.2251-1-p.yadav@xxxxxx/ Cheers, Miquèl Changes in v5: * Used the uint64-array instead of the matrix type. * Updated the example as well to use a single "/bits/ 64" cast because doing it twice, despite being supported by the language itself, is not yet something that we can use for describing bindings. Changes in v4: * Changed the type of properties to uint64-arrays in order to be able to describe the size of each element in the array. * Updated the example accordingly. Changes in v3: * Rebased on top of Pratyush's recent changes. * Dropped the commit allowing to provide two reg entries on the node name. * Dropped the commit referencing spi-controller.yaml from jedec,spi-nor.yaml, now replaced by spi-peripheral-props.yaml and already done in Pratyush's series. * Added Rob's Ack. * Enhanced a commit message. * Moved the new properties to the new SPI peripheral binding file. Changes in v2: * Dropped the dtc changes for now. * Moved the properties in the device's nodes, not the controller's. * Dropped the useless #address-cells change. * Added a missing "minItems". * Moved the new properties in the spi-controller.yaml file. * Added an example using two stacked memories in the spi-controller.yaml file. * Renamed the properties to drop the Xilinx prefix. * Added a patch to fix the spi-nor jedec yaml file. Miquel Raynal (3): dt-bindings: mtd: spi-nor: Allow two CS per device spi: dt-bindings: Describe stacked/parallel memories modes spi: dt-bindings: Add an example with two stacked flashes .../bindings/mtd/jedec,spi-nor.yaml | 3 ++- .../bindings/spi/spi-controller.yaml | 7 ++++++ .../bindings/spi/spi-peripheral-props.yaml | 25 +++++++++++++++++++ 3 files changed, 34 insertions(+), 1 deletion(-) -- 2.27.0
