Add bindings doc for Sunplus SoC PWM Driver Signed-off-by: Hammer Hsieh <hammer.hsieh@xxxxxxxxxxx> --- .../devicetree/bindings/pwm/pwm-sunplus.yaml | 45 ++++++++++++++++++++++ MAINTAINERS | 5 +++ 2 files changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sunplus.yaml diff --git a/Documentation/devicetree/bindings/pwm/pwm-sunplus.yaml b/Documentation/devicetree/bindings/pwm/pwm-sunplus.yaml new file mode 100644 index 0000000..9af19df --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-sunplus.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) Sunplus Co., Ltd. 2021 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/pwm-sunplus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sunplus SoC PWM Controller + +maintainers: + - Hammer Hsieh <hammer.hsieh@xxxxxxxxxxx> + +properties: + '#pwm-cells': + const: 2 + + compatible: + items: + - const: sunplus,sp7021-pwm + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - '#pwm-cells' + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + pwm: pwm@9c007a00 { + #pwm-cells = <2>; + compatible = "sunplus,sp7021-pwm"; + reg = <0x9c007a00 0x80>; + clocks = <&clkc 0xa2>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 13f9a84..721ed79 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18242,6 +18242,11 @@ L: netdev@xxxxxxxxxxxxxxx S: Maintained F: drivers/net/ethernet/dlink/sundance.c +SUNPLUS PWM DRIVER +M: Hammer Hsieh <hammer.hsieh@xxxxxxxxxxx> +S: Maintained +F: Documentation/devicetree/bindings/pwm/pwm-sunplus.yaml + SUPERH M: Yoshinori Sato <ysato@xxxxxxxxxxxxxxxxxxxx> M: Rich Felker <dalias@xxxxxxxx> -- 2.7.4
