The USB3 glue layer has 2 areas in the register set, see RM Rev.1
section 11.2.5.2.1 GLUE_usb3 memory map:
* USB3 control/status
* PHY control/status
Provide the memory area to the usb3_phy nodes for accessing the features
in the USB3 control area.
Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 6b840c05dd77..4958142da1e4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -910,7 +910,8 @@ ddr-pmu@3d800000 {
usb3_phy0: usb-phy@381f0040 {
compatible = "fsl,imx8mp-usb-phy";
- reg = <0x381f0040 0x40>;
+ reg = <0x381f0040 0x40>,
+ <0x381f0000 0x20>;
clocks = <&clk IMX8MP_CLK_USB_PHY_ROOT>;
clock-names = "phy";
assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>;
@@ -952,7 +953,8 @@ usb_dwc3_0: usb@38100000 {
usb3_phy1: usb-phy@382f0040 {
compatible = "fsl,imx8mp-usb-phy";
- reg = <0x382f0040 0x40>;
+ reg = <0x382f0040 0x40>,
+ <0x382f0000 0x20>;
clocks = <&clk IMX8MP_CLK_USB_PHY_ROOT>;
clock-names = "phy";
assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>;
--
2.25.1
