Add the spmi bus as found in the SM8450 SoC
Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index f75de777f6ea..b80e34fd3fe1 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -645,6 +645,24 @@ pdc: interrupt-controller@b220000 {
interrupt-controller;
};
+ spmi_bus: spmi@c42d000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0x0 0x0c400000 0x0 0x00003000>,
+ <0x0 0x0c500000 0x0 0x00400000>,
+ <0x0 0x0c440000 0x0 0x00080000>,
+ <0x0 0x0c4c0000 0x0 0x00010000>,
+ <0x0 0x0c42d000 0x0 0x00010000>;
+ reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+ interrupt-names = "periph_irq";
+ interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+ qcom,ee = <0>;
+ qcom,channel = <0>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ };
+
tlmm: pinctrl@f100000 {
compatible = "qcom,sm8450-tlmm";
reg = <0 0x0f100000 0 0x300000>;
--
2.31.1
