On Fri, Nov 19, 2021 at 06:16:21PM -0600, Li Yang wrote: > Some platforms using this controller have separated interrupt lines for > aer or pme events instead of having a single interrupt line for > miscellaneous events. Define interrupts in the binding for these > interrupt lines. s/separated/separate/ In subject, commit log, and description and comments below: s/aer/AER/ s/pme/PME/ These are acronyms, not words, and capitalizing them matches usage in the specs. It's OK to keep them lower-case in code-like things like variable names and interrupt-names. > Signed-off-by: Li Yang <leoyang.li@xxxxxxx> > --- > .../devicetree/bindings/pci/layerscape-pci.txt | 14 ++++++++++---- > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > index 8fd6039a826b..bcf11bfc4bab 100644 > --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt > +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt > @@ -31,8 +31,13 @@ Required properties: > - reg: base addresses and lengths of the PCIe controller register blocks. > - interrupts: A list of interrupt outputs of the controller. Must contain an > entry for each entry in the interrupt-names property. > -- interrupt-names: Must include the following entries: > - "intr": The interrupt that is asserted for controller interrupts > +- interrupt-names: It could include the following entries: > + "aer": For interrupt line reporting aer events when non MSI/MSI-X/INTx mode > + is used > + "pme": For interrupt line reporting pme events when non MSI/MSI-X/INTx mode > + is used > + "intr": For interrupt line reporting miscellaneous controller events > + ...... > - fsl,pcie-scfg: Must include two entries. > The first entry must be a link to the SCFG device node > The second entry is the physical PCIe controller index starting from '0'. > @@ -52,8 +57,9 @@ Example: > reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ > 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ > reg-names = "regs", "config"; > - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ > - interrupt-names = "intr"; > + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, /* aer interrupt */ > + <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* pme interrupt */ > + interrupt-names = "aer", "pme"; > fsl,pcie-scfg = <&scfg 0>; > #address-cells = <3>; > #size-cells = <2>; > -- > 2.25.1 >
