R40 and A10/A20 share the same EMAC IP.
However, on R40 the EMAC is gated by default, so reset
property is required.
Signed-off-by: Evgeny Boger <boger@xxxxxxxxxxxxxx>
---
.../net/allwinner,sun4i-a10-emac.yaml | 20 ++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
index 8d8560a67abf..cbb297c38daa 100644
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
@@ -15,7 +15,9 @@ maintainers:
properties:
compatible:
- const: allwinner,sun4i-a10-emac
+ enum:
+ - allwinner,sun4i-a10-emac
+ - allwinner,sun4i-r40-emac
reg:
maxItems: 1
@@ -30,6 +32,19 @@ properties:
description: Phandle to the device SRAM
$ref: /schemas/types.yaml#/definitions/phandle-array
+ resets:
+ maxItems: 1
+
+if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,sun4i-r40-emac
+
+then:
+ required:
+ - resets
+
required:
- compatible
- reg
@@ -42,11 +57,14 @@ unevaluatedProperties: false
examples:
- |
+ #define RST_BUS_EMAC 14
+
emac: ethernet@1c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
clocks = <&ahb_gates 17>;
+ resets = <&ccu RST_BUS_EMAC>;
phy-handle = <&phy0>;
allwinner,sram = <&emac_sram 1>;
};
--
2.25.1
