<snipped...> > > Subject: Re: [PATCH v5 0/8] Add the imx8m pcie phy driver and imx8mm > > pcie support > > > > On Mon, Nov 1, 2021 at 7:58 PM Richard Zhu <hongxing.zhu@xxxxxxx> > > wrote: > > > > > > Refer to the discussion [1] when try to enable i.MX8MM PCIe support, > > > one standalone PCIe PHY driver should be seperated from i.MX PCIe > > > driver when enable i.MX8MM PCIe support. > > > > > > This patch-set adds the standalone PCIe PHY driver suport[1-5], and > > > i.MX8MM PCIe support[6-8] to have whole view to review this > > patch-set. > > > > > > The PCIe works on i.MX8MM EVK board based the the blkctrl power > > driver > > > [2] and this patch-set. And tested by Tim and Marcel on the > > > different reference clock modes boards. > > > > > > [1] > > > > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > > tc > > > > > > hwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F20210510141509. > > 929120 > > > > > > -3-l.stach%40pengutronix.de%2F&data=04%7C01%7Chongxing.zhu > > %40nxp.c > > > > > > om%7C489971db9c0f4308600208d9a88b2b05%7C686ea1d3bc2b4c6fa9 > > 2cd99c5c3016 > > > > > > 35%7C0%7C0%7C637726137953234928%7CUnknown%7CTWFpbGZsb3d > > 8eyJWIjoiMC4wLj > > > > > > AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000& > > amp;sdata= > > > > > > ltuNZqIAsEH6%2B1KE4cqNOiUul3Ex%2BWmYcyqD%2BFJuUrs%3D& > > reserved=0 > > > [2] > > > > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > > tc > > > > > > hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F20210910 > > 202640 > > > .980366-1-l.stach%40pengutronix.de%2F&data=04%7C01%7Ch > on > > gxing.zhu% > > > > > > 40nxp.com%7C489971db9c0f4308600208d9a88b2b05%7C686ea1d3bc2 > > b4c6fa92cd99 > > > > > > c5c301635%7C0%7C0%7C637726137953234928%7CUnknown%7CTWFp > > bGZsb3d8eyJWIjo > > > > > > iMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D% > > 7C3000& > > > ;sdata=MrT3Re3YttE9AoqmGHksTqt4jF4vitRPz5lkgpZqSZ4%3D&r > es > > erved=0 > > > > > > Main changes v4 --> v5: > > > - Set the AUX_EN always 1b'1, thus it can fix the regression > > > introduced > > in v4 > > > series on Marcel's board. > > > - Use the lower-case letter in the devicetreee refer to Marcel's > > comments. > > > - Since the default value of the deemphasis parameters are zero, > > > only > > set > > > the deemphasis registers when the input paramters are none zero. > > > > > > Main changes v3 --> v4: > > > - Update the yaml to fix syntax error, add maxitems and drop > > > description of phy > > > - Correct the clock name in PHY DT node. > > > - Squash the EVK board relalted dts changes into one patch, and drop > > the > > > useless dummy clock and gpio suffix in DT nodes. > > > - Add board specific de-emphasis parameters as DT properties. Thus > > each board > > > can specify its actual de-emphasis values. > > > - Update the commit log of PHY driver. > > > - Remove the useless codes from PCIe driver, since they are moved to > > > PHY driver > > > - After the discussion and verification of the CLKREQ# > > > configurations > > with Tim, > > > agree to add an optional boolean property > > > "fsl,clkreq-unsupported", > > indicates > > > the CLKREQ# signal is hooked or not in HW designs. > > > - Add "Tested-by: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>" > > > tag, > > since > > > Marcel help to test the v3 patch-set. > > > > > > Main changes v2 --> v3: > > > - Regarding Lucas' comments. > > > - to have a whole view to review the patches, send out the > i.MX8MM > > PCIe support too. > > > - move the PHY related bits manipulations of the GPR/SRC to > > standalone PHY driver. > > > - split the dts changes to SOC and board DT, and use the enum > > > instead > > of raw value. > > > - update the license of the dt-binding header file. > > > > > > Changes v1 --> v2: > > > - Update the license of the dt-binding header file to make the license > > > compatible with dts files. > > > - Fix the dt_binding_check errors. > > > > > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | > 6 > > +++ > > > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml | > 95 > > ++++++++++++++++++++++++++++++++ > > > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > | > > 55 +++++++++++++++++++ > > > arch/arm64/boot/dts/freescale/imx8mm.dtsi > | > > 46 +++++++++++++++- > > > drivers/pci/controller/dwc/pci-imx6.c | > > 73 ++++++++++++++++++++++--- > > > drivers/phy/freescale/Kconfig > | > > 9 ++++ > > > drivers/phy/freescale/Makefile > | > > 1 + > > > drivers/phy/freescale/phy-fsl-imx8m-pcie.c | > > 237 > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > > +++++++++++++++++++++ > > > include/dt-bindings/phy/phy-imx8-pcie.h | > > 14 +++++ > > > 9 files changed, 528 insertions(+), 8 deletions(-) > > > > > > [PATCH v5 1/8] dt-bindings: phy: phy-imx8-pcie: Add binding for the > > > [PATCH v5 2/8] dt-bindings: phy: Add imx8 pcie phy driver support > > > [PATCH v5 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name > > > [PATCH v5 4/8] arm64: dts: imx8mm: Add the pcie phy support > [PATCH > > v5 > > > 5/8] phy: freescale: pcie: Initialize the imx8 pcie [PATCH v5 6/8] > > > arm64: dts: imx8mm: Add the pcie support [PATCH v5 7/8] arm64: > dts: > > > imx8mm-evk: Add the pcie support on imx8mm [PATCH v5 8/8] PCI: > > imx: > > > Add the imx8mm pcie support > > > > Richard, > > > > Are you posting a v6 of this series or have we already missed the > > window for 5.16? > [Richard Zhu] Hi Tim: > Thanks for your kindly reminder. > In my original plan, I prefer to merge the codes refine firstly, then issue > the v6 patch-set after the rebase. > https://patchwork.kernel.org/project/linux-arm-kernel/cover/163574747 > 8-25562-1-git-send-email-hongxing.zhu@xxxxxxx/ > Unfortunately, I don't get ack from Lucas for other four patches. > Anyway, I would post the v6 patch-set immediately after merge Rob's > comments. > > Best Regards > Richard Zhu > > > > Best regards, > > [Richard Zhu] Hi Tim: The V6 patch-set listed below had been issued. " https://patchwork.kernel.org/project/linux-phy/cover/1637028976-9201-1-git-send-email-hongxing.zhu@xxxxxxx/"; GENERIC PHY FRAMEWORK maintainer Kishon and Vinod had been contained in the mail-loop. Do you know who I can ping to pick up the PHY part of this patch-set? Best Regards Richard Zhu > > Tim
