This patch serie adds support for Microchip lan966x serdes. The lan966x
device contains 7 interfaces, consisting of 2 copper transceivers,
3 Serdes and 2 RGMII interfaces. Two of the Serdes support QSGMII.
The driver also adds the functionality of "muxing" the interfaces to
different logical ports.
The following table shows which interfaces can be supported by the port.
PortNumber Max Speed Ethernet interface options
0 1Gbps CuPHY, 1G SGMII or QSGMII
1 1Gbps CuPHY, 1G SGMII or QSGMII
2 2.5Gbps 2.5G SGMII, QSGMII, RGMII
3 2.5Gbps 2.5G SGMII, QSGMII, RGMII
4 2.5Gbps 2.5G SGMII, QSGMII
5 1Gbps QSGMII, RGMII
6 1Gbps QSGMII, RGMII
7 1Gbps QSGMII
v3->v4:
- update description of the driver
- removed unused registers
- use bitfield operations in the registers
- add macros for PLL configuration
- move macros and structs at the top of the file
v2->v3:
- remove unused includes
- add missing '...' in microchip,lan966x-serdes.yaml
- rename lan966x-serdes.h to phy-lan966x-serdes.h
- Rename CU->PHY and RG->RGMII
- update commit message for PATCH 2
v1->v2:
- replace the regmap with iomem
- update DT bindings
Horatiu Vultur (3):
dt-bindings: phy: Add lan966x-serdes binding
dt-bindings: phy: Add constants for lan966x serdes
phy: Add lan966x ethernet serdes PHY driver
.../phy/microchip,lan966x-serdes.yaml | 59 ++
drivers/phy/microchip/Kconfig | 8 +
drivers/phy/microchip/Makefile | 1 +
drivers/phy/microchip/lan966x_serdes.c | 548 ++++++++++++++++++
drivers/phy/microchip/lan966x_serdes_regs.h | 209 +++++++
include/dt-bindings/phy/phy-lan966x-serdes.h | 14 +
6 files changed, 839 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/microchip,lan966x-serdes.yaml
create mode 100644 drivers/phy/microchip/lan966x_serdes.c
create mode 100644 drivers/phy/microchip/lan966x_serdes_regs.h
create mode 100644 include/dt-bindings/phy/phy-lan966x-serdes.h
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2.33.0
