Hi Geert,
Thank you for the review.
On Mon, Nov 8, 2021 at 3:40 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> On Fri, Oct 29, 2021 at 2:45 PM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote:
> > RZ/G2L supports two groups of pins Group-A and Group-B. For Group-A
> > pins drive-strength can be configured and for Group-B output-impedance
> > can be configured.
> >
> > This patch splits PIN_CFG_IOLH macro to PIN_CFG_IOLH_A/B and adds
> > support to get/set drive-strength and output-impedance-ohms for the
> > supported pins.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
>
> > @@ -501,7 +507,7 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
> > unsigned int arg = 0;
> > unsigned long flags;
> > void __iomem *addr;
> > - u32 port = 0;
> > + u32 port = 0, reg;
>
> "unsigned int index", for symmetry with rzg2l_pinctrl_pinconf_set()?
>
Agreed.
> > u32 cfg = 0;
> > u8 bit = 0;
> >
> > @@ -549,6 +555,24 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
> > break;
> > }
> >
> > + case PIN_CONFIG_DRIVE_STRENGTH: {
> > + if (!(cfg & PIN_CFG_IOLH_A))
> > + return -EINVAL;
> > +
> > + reg = rzg2l_read_pin_config(pctrl, port_pin, IOLH(port), bit, IOLH_MASK);
>
> port_pin still under discussion, cfr. my comments for the other
> patches in this series.
>
As discussed in patch 3/5 will drop this.
Cheers,
Prabhakar
> The rest looks good to me, so
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
