From: Sean Paul <seanpaul@xxxxxxxxxxxx> This patch adds the bindings for the MSM DisplayPort HDCP registers which are required to write the HDCP key into the display controller as well as the registers to enable HDCP authentication/key exchange/encryption. We'll use a new compatible string for this since the fields are optional. Cc: Rob Herring <robh@xxxxxxxxxx> Cc: Stephen Boyd <swboyd@xxxxxxxxxxxx> Signed-off-by: Sean Paul <seanpaul@xxxxxxxxxxxx> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@xxxxxxxxxx #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@xxxxxxxxxx #v2 Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@xxxxxxxxxx #v3 Changes in v2: -Drop register range names (Stephen) -Fix yaml errors (Rob) Changes in v3: -Add new compatible string for dp-hdcp -Add descriptions to reg -Add minItems/maxItems to reg -Make reg depend on the new hdcp compatible string Changes in v4: -Rebase on Bjorn's multi-dp patchset --- .../devicetree/bindings/display/msm/dp-controller.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index b36d74c1da7c..f6e4b102373a 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -21,12 +21,16 @@ properties: - qcom,sc8180x-edp reg: + minItems: 5 + maxItems: 7 items: - description: ahb register block - description: aux register block - description: link register block - description: p0 register block - description: p1 register block + - description: (Optional) Registers for HDCP device key injection + - description: (Optional) Registers for HDCP TrustZone interaction interrupts: maxItems: 1 @@ -111,7 +115,9 @@ examples: <0xae90200 0x200>, <0xae90400 0xc00>, <0xae91000 0x400>, - <0xae91400 0x400>; + <0xae91400 0x400>, + <0x0aed1000 0x174>, + <0x0aee1000 0x2c>; interrupt-parent = <&mdss>; interrupts = <12>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, -- Sean Paul, Software Engineer, Google / Chromium OS
