Add the possibility to configure PMIC 32kHz output clock as CRITICAL,
so that they are never gated off. This is useful in case those clock
supply some vital clock net, which requires the clock to always run.
The iMX8M RTC XTAL input is one such example, if the clock are ever
gated off, the system locks up completely. The clock must be present
and enabled even if the RTC is unused.
Signed-off-by: Marek Vasut <marex@xxxxxxx>
Cc: Matti Vaittinen <matti.vaittinen@xxxxxxxxxxxxxxxxx>
Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Stephen Boyd <sboyd@xxxxxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: linux-power@xxxxxxxxxxxxxxxxx
To: linux-clk@xxxxxxxxxxxxxxx
---
Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
index 5d531051a153..2497ade2bbd0 100644
--- a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
@@ -41,6 +41,11 @@ properties:
clock-output-names:
maxItems: 1
+ rohm,clock-output-is-critical:
+ description:
+ Never gate off C32K_OUT clock.
+ type: boolean
+
# The BD71847 abd BD71850 support two different HW states as reset target
# states. States are called as SNVS and READY. At READY state all the PMIC
# power outputs go down and OTP is reload. At the SNVS state all other logic
--
2.33.0
