On Wed, 6 Oct 2021 at 17:56, Hector Martin <marcan@xxxxxxxxx> wrote: > > On 07/10/2021 00.52, Hector Martin wrote: > > I realize this is all kind of "not the way things are usually done", but > > I don't want to pass up on the opportunity to have one driver last us > > multiple SoCs if we have the chance, and it's looking like it should :-) > > Addendum: just found some prior art for this. See power/pd-samsung.yaml, > which is another single-PD binding (though in that case they put them in > the SoC node directly, not under a syscon). Maybe the design is actually similar. In the Exynos there is a entire subblock managing power - called Power Management Unit (PMU). It controls most of power-related parts, except clock gating. For example it covers registers related to entering deep-sleep modes or power domains. However we split this into two: 1. Actual PMU driver which controls system-level power (and provides syscon for other drivers needing to poke its registers... eh, life). 2. Power domain driver which binds multiple devices to a small address spaces (three registers) inside PMU address space. The address spaces above overlap, so the (1) PMU driver takes for example 1004_0000 - 1004_5000 and power domain devices bind to e.g. 1004_4000, 1004_4020, 1004_4040. Best regards, Krzysztof
